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<a href="#pub-attribs">Data Fields</a>  </div>
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<div class="title">cy_stc_seglcd_config_t Struct Reference<div class="ingroups"><a class="el" href="group__group__seglcd.html">SegLCD       (Segment LCD)</a> &raquo; <a class="el" href="group__group__seglcd__data__structures.html">Data Structures</a></div></div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<div class="textblock"><p>Configuration structure. </p>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a1be9b9b30d3113fe5c2ce54e6b837740"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__seglcd__enums.html#gab22a15df01ec018165a1a7e812f70bb0">cy_en_seglcd_speed_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#a1be9b9b30d3113fe5c2ce54e6b837740">speed</a></td></tr>
<tr class="memdesc:a1be9b9b30d3113fe5c2ce54e6b837740"><td class="mdescLeft">&#160;</td><td class="mdescRight">Speed mode selection, see: <a class="el" href="group__group__seglcd__enums.html#gab22a15df01ec018165a1a7e812f70bb0" title="SegLCD block speed mode. ">cy_en_seglcd_speed_t</a>.  <a href="#a1be9b9b30d3113fe5c2ce54e6b837740">More...</a><br /></td></tr>
<tr class="separator:a1be9b9b30d3113fe5c2ce54e6b837740"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6a9444555b4cc7d3c545a1272e28fc76"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__seglcd__enums.html#ga255aa427b265f88cc6e618cdc5491248">cy_en_seglcd_wave_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#a6a9444555b4cc7d3c545a1272e28fc76">wave</a></td></tr>
<tr class="memdesc:a6a9444555b4cc7d3c545a1272e28fc76"><td class="mdescLeft">&#160;</td><td class="mdescRight">Waveform type configuration, see: <a class="el" href="group__group__seglcd__enums.html#ga255aa427b265f88cc6e618cdc5491248" title="SegLCD driving waveform type. ">cy_en_seglcd_wave_t</a>.  <a href="#a6a9444555b4cc7d3c545a1272e28fc76">More...</a><br /></td></tr>
<tr class="separator:a6a9444555b4cc7d3c545a1272e28fc76"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afc91e08c26e68bfd0b7707f02ffe272c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__seglcd__enums.html#gaff012223bec16a8c88dfdb39bd304893">cy_en_seglcd_drive_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#afc91e08c26e68bfd0b7707f02ffe272c">drive</a></td></tr>
<tr class="memdesc:afc91e08c26e68bfd0b7707f02ffe272c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driving mode configuration, see: <a class="el" href="group__group__seglcd__enums.html#gaff012223bec16a8c88dfdb39bd304893" title="SegLCD driving mode configuration. ">cy_en_seglcd_drive_t</a>.  <a href="#afc91e08c26e68bfd0b7707f02ffe272c">More...</a><br /></td></tr>
<tr class="separator:afc91e08c26e68bfd0b7707f02ffe272c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab3f79d01165e2a5f3926ab943d01a789"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__seglcd__enums.html#ga2b57420866b0307ca04c1e033790661c">cy_en_seglcd_bias_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#ab3f79d01165e2a5f3926ab943d01a789">bias</a></td></tr>
<tr class="memdesc:ab3f79d01165e2a5f3926ab943d01a789"><td class="mdescLeft">&#160;</td><td class="mdescRight">PWM bias selection, see: <a class="el" href="group__group__seglcd__enums.html#ga2b57420866b0307ca04c1e033790661c" title="SegLCD PWM bias selection. ">cy_en_seglcd_bias_t</a>.  <a href="#ab3f79d01165e2a5f3926ab943d01a789">More...</a><br /></td></tr>
<tr class="separator:ab3f79d01165e2a5f3926ab943d01a789"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a77554e22d4f2ad59e59841a6e6faf3d5"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__seglcd__enums.html#ga4e8bfe5d2149ea8d82ac609367709c95">cy_en_seglcd_lsclk_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#a77554e22d4f2ad59e59841a6e6faf3d5">lsClk</a></td></tr>
<tr class="memdesc:a77554e22d4f2ad59e59841a6e6faf3d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Low Speed Mode clock selection, see: <a class="el" href="group__group__seglcd__enums.html#ga4e8bfe5d2149ea8d82ac609367709c95" title="SegLCD block low speed mode clock source selection. ">cy_en_seglcd_lsclk_t</a>.  <a href="#a77554e22d4f2ad59e59841a6e6faf3d5">More...</a><br /></td></tr>
<tr class="separator:a77554e22d4f2ad59e59841a6e6faf3d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad28a0040577c34d63ae68b839e2d9116"><td class="memItemLeft" align="right" valign="top"><a id="ad28a0040577c34d63ae68b839e2d9116"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#ad28a0040577c34d63ae68b839e2d9116">comNum</a></td></tr>
<tr class="memdesc:ad28a0040577c34d63ae68b839e2d9116"><td class="mdescLeft">&#160;</td><td class="mdescRight">The number of Common connections, the valid range is 2...16 however the maximum is dependent on PSoC device family - there could be limitation to 4 or 8 commons, see the device TRM. <br /></td></tr>
<tr class="separator:ad28a0040577c34d63ae68b839e2d9116"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5aa06fe4a2252a60e2e5b638cc9a49c7"><td class="memItemLeft" align="right" valign="top"><a id="a5aa06fe4a2252a60e2e5b638cc9a49c7"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#a5aa06fe4a2252a60e2e5b638cc9a49c7">frRate</a></td></tr>
<tr class="memdesc:a5aa06fe4a2252a60e2e5b638cc9a49c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">The LCD frame rate, the valid range is 30...150. <br /></td></tr>
<tr class="separator:a5aa06fe4a2252a60e2e5b638cc9a49c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae5789b3ceabe5f3944ad87fb9d896e0d"><td class="memItemLeft" align="right" valign="top"><a id="ae5789b3ceabe5f3944ad87fb9d896e0d"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#ae5789b3ceabe5f3944ad87fb9d896e0d">contrast</a></td></tr>
<tr class="memdesc:ae5789b3ceabe5f3944ad87fb9d896e0d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The LCD contrast, the valid range is 0...100. <br /></td></tr>
<tr class="separator:ae5789b3ceabe5f3944ad87fb9d896e0d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad72440f94cfffb60d7223157722e5769"><td class="memItemLeft" align="right" valign="top"><a id="ad72440f94cfffb60d7223157722e5769"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__seglcd__config__t.html#ad72440f94cfffb60d7223157722e5769">clkFreq</a></td></tr>
<tr class="memdesc:ad72440f94cfffb60d7223157722e5769"><td class="mdescLeft">&#160;</td><td class="mdescRight">The LCD clock frequency (ignored for <a class="el" href="group__group__seglcd__enums.html#gga4e8bfe5d2149ea8d82ac609367709c95abadf62ab3037855e61b95e5a13be87bb">CY_SEGLCD_LSCLK_LF</a> mode, or in <a class="el" href="group__group__seglcd__enums.html#ggab22a15df01ec018165a1a7e812f70bb0a40ab3d2e383afd394814b78b98fa9cfb">CY_SEGLCD_SPEED_LOW</a> mode for MXLCD_ver1), the valid range is 10000...100000000 (Hz) <br /></td></tr>
<tr class="separator:ad72440f94cfffb60d7223157722e5769"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Field Documentation</h2>
<a id="a1be9b9b30d3113fe5c2ce54e6b837740"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1be9b9b30d3113fe5c2ce54e6b837740">&#9670;&nbsp;</a></span>speed</h2>

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          <td class="memname"><a class="el" href="group__group__seglcd__enums.html#gab22a15df01ec018165a1a7e812f70bb0">cy_en_seglcd_speed_t</a> cy_stc_seglcd_config_t::speed</td>
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<p>Speed mode selection, see: <a class="el" href="group__group__seglcd__enums.html#gab22a15df01ec018165a1a7e812f70bb0" title="SegLCD block speed mode. ">cy_en_seglcd_speed_t</a>. </p>

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<a id="a6a9444555b4cc7d3c545a1272e28fc76"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6a9444555b4cc7d3c545a1272e28fc76">&#9670;&nbsp;</a></span>wave</h2>

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          <td class="memname"><a class="el" href="group__group__seglcd__enums.html#ga255aa427b265f88cc6e618cdc5491248">cy_en_seglcd_wave_t</a> cy_stc_seglcd_config_t::wave</td>
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<p>Waveform type configuration, see: <a class="el" href="group__group__seglcd__enums.html#ga255aa427b265f88cc6e618cdc5491248" title="SegLCD driving waveform type. ">cy_en_seglcd_wave_t</a>. </p>

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<a id="afc91e08c26e68bfd0b7707f02ffe272c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afc91e08c26e68bfd0b7707f02ffe272c">&#9670;&nbsp;</a></span>drive</h2>

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          <td class="memname"><a class="el" href="group__group__seglcd__enums.html#gaff012223bec16a8c88dfdb39bd304893">cy_en_seglcd_drive_t</a> cy_stc_seglcd_config_t::drive</td>
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<p>Driving mode configuration, see: <a class="el" href="group__group__seglcd__enums.html#gaff012223bec16a8c88dfdb39bd304893" title="SegLCD driving mode configuration. ">cy_en_seglcd_drive_t</a>. </p>

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<a id="ab3f79d01165e2a5f3926ab943d01a789"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab3f79d01165e2a5f3926ab943d01a789">&#9670;&nbsp;</a></span>bias</h2>

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          <td class="memname"><a class="el" href="group__group__seglcd__enums.html#ga2b57420866b0307ca04c1e033790661c">cy_en_seglcd_bias_t</a> cy_stc_seglcd_config_t::bias</td>
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<p>PWM bias selection, see: <a class="el" href="group__group__seglcd__enums.html#ga2b57420866b0307ca04c1e033790661c" title="SegLCD PWM bias selection. ">cy_en_seglcd_bias_t</a>. </p>

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<a id="a77554e22d4f2ad59e59841a6e6faf3d5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a77554e22d4f2ad59e59841a6e6faf3d5">&#9670;&nbsp;</a></span>lsClk</h2>

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          <td class="memname"><a class="el" href="group__group__seglcd__enums.html#ga4e8bfe5d2149ea8d82ac609367709c95">cy_en_seglcd_lsclk_t</a> cy_stc_seglcd_config_t::lsClk</td>
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<p>Low Speed Mode clock selection, see: <a class="el" href="group__group__seglcd__enums.html#ga4e8bfe5d2149ea8d82ac609367709c95" title="SegLCD block low speed mode clock source selection. ">cy_en_seglcd_lsclk_t</a>. </p>
<p>This is effective for MXLCD_ver2, for MXLCD_ver1 it is ignored. </p>

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